CS4207-CNZ Cirrus Logic IC CODEC AUD HDPN AMP COMM 48QFN

label:
2024/01/23 284



CATALOG
CS4207-CNZ COUNTRY OF ORIGIN
CS4207-CNZ PARAMETRIC INFO
CS4207-CNZ PACKAGE INFO
CS4207-CNZ MANUFACTURING INFO
CS4207-CNZ PACKAGING INFO
CS4207-CNZ ECAD MODELS


COUNTRY OF ORIGIN
Taiwan (Province of China)


PARAMETRIC INFO
Type PCM
ADC/DAC Resolution (bit) 24
Number of ADCs 4
Number of DACs 6
Number of Channels 4ADC / 6DAC
Number of ADC Inputs 2
Number of DAC Outputs 2
Maximum Power Dissipation (mW) 7
Total Harmonic Distortion Plus Noise (THD+N) (dB) -94
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 85
Power Supply Type Analog|Digital
Typical Operating Supply Voltage (V) 1.5|1.8|3.3|5
Operating Supply Voltage (V) 1.5|1.8|3.3|5
Minimum Operating Supply Voltage (V) 1.42|2.97
Maximum Operating Supply Voltage (V) 1.89|5.25


PACKAGE INFO
Supplier Package QFN EP
Basic Package Type Non-Lead-Frame SMT
Pin Count 48
Lead Shape No Lead
PCB 48
Tab N/R
Pin Pitch (mm) 0.4
Package Length (mm) 6
Package Width (mm) 6
Package Height (mm) 0.75(Max)
Package Diameter (mm) N/R
Seated Plane Height (mm) 0.75
Mounting Surface Mount
Package Weight (g) N/A
Package Material Plastic
Package Description Quad Flat No Lead Package, Exposed Pad
Package Family Name QFN
Jedec N/A


MANUFACTURING INFO
MSL 3
Maximum Reflow Temperature (°C) 260
Reflow Solder Time (Sec) 20 to 40
Number of Reflow Cycle 3
Standard J-STD-020C
Reflow Temp. Source Link to Datasheet
Maximum Wave Temperature (°C) N/R
Wave Solder Time (Sec) N/R
Wave Temp. Source Link to Datasheet
Lead Finish(Plating) Matte Sn
Under Plating Material N/A
Terminal Base Material N/A


PACKAGING INFO
Packaging Rail


ECAD MODELS


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