MCIMX6S6AVM08AD NXP Semiconductors I.MX6SOLO ROM PERF ENHAN

label:
2023/12/20 453


• The i.MX 6Solo supports single Arm Cortex-A9 MPCore (with TrustZone)
• The i.MX 6DualLite supports dual Arm Cortex-A9 MPCore (with TrustZone)
• The core configuration is symmetric, where each core includes
• External memory interfaces: The i.MX 6Solo/6DualLite processors support latest, high volume, cost effective handheld DRAM, NOR, and NAND Flash memory standards.  
• Displays—Total of four interfaces available. Total raw pixel rate of all interfaces is up to 450 Mpixels/sec, 24 bpp. Up to two interfaces may be active in parallel.
• Camera sensors:
   — Two parallel Camera ports (up to 20 bit and up to 240 MHz peak)
   — MIPI CSI-2 Serial port, supporting from 80 Mbps to 1 Gbps speed per data lane. The CSI-2 Receiver core can manage one clock lane and up to two data lanes. Each i.MX 6Solo/6DualLite processor has two lanes.
• Expansion cards: — Four MMC/SD/SDIO card ports all supporting:
   – 1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR-104 mode (104 MB/s max)
   – 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both SDR and DDR modes (104 MB/s max)
• USB:
   — One high speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB Phy
   — Three USB 2.0 (480 Mbps) hosts:
      – One HS host with integrated High Speed Phy
      – Two HS hosts with integrated HS-IC USB (High Speed Inter-Chip USB) Phy
• Expansion PCI Express port (PCIe) v2.0 one lane
   — PCI Express (Gen 2.0) dual mode complex, supporting Root complex operations and Endpoint operations. Uses x1 PHY configuration.


CATALOG
MCIMX6S6AVM08AD COUNTRY OF ORIGIN
MCIMX6S6AVM08AD PARAMETRIC INFO
MCIMX6S6AVM08AD PACKAGE INFO
MCIMX6S6AVM08AD PACKAGING INFO
MCIMX6S6AVM08AD FUNCTIONAL BLOCK DIAGRAM  


COUNTRY OF ORIGIN
China


PARAMETRIC INFO
Tradename i.MX
Family Name i.MX 6Solo
Data Bus Width (bit) 32
Device Core ARM Cortex A9
Maximum Clock Rate (MHz) 800
Program Memory Type ROM
Program Memory Size 96KB
RAM Size 128KB
Maximum Speed (MHz) 800
Number of Timers 3
Processing Unit Microprocessor
Process Technology 40nm
Application Automotive Navigation and Entertainment/Graphics Rendering for Human Machine Interfaces/Audio Playback/Video Processing and Display
Core Architecture ARM
Type Applications Processor
PWM 4
Ethernet Speed 10Mbps/100Mbps/1000Mbps
Watchdog 2
Interface Type CAN/Ethernet/I2C/I2S/SPI/UART/USB
USART 0
Ethernet 1
I2C 4
I2S 3
SPI 4
UART 5
USB 4
CAN 2
Programmability Yes
Minimum Operating Supply Voltage (V) 1.65
Typical Operating Supply Voltage (V) 1.8|2.8|3.3
Maximum Operating Supply Voltage (V) 3.6
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 125
Temperature Flag Jun
Supplier Temperature Grade Automotive
Minimum Storage Temperature (°C) -40
Maximum Storage Temperature (°C) 150
 
PACKAGE INFO
Supplier Package LFBGA
Basic Package Type Ball Grid Array
Pin Count 624
Lead Shape Ball
PCB 624
Tab N/R
Pin Pitch (mm) 0.8
Package Length (mm) 21
Package Width (mm) 21
Package Height (mm) 1.06
Package Diameter (mm) N/R
Seated Plane Height (mm) 1.6(Max)
Mounting Surface Mount
Package Material Plastic
Package Description Low Profile Fine Pitch Ball Grid Array
Package Family Name BGA
Package Outline Link to Datasheet
 
PACKAGING INFO
Packaging Tray
Quantity Of Packaging 60(Min)
 
FUNCTIONAL BLOCK DIAGRAM

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